Non-linear processing apparatus, image display apparatus

ABSTRACT

A nonlinearly processed (gamma-corrected) video signal is subjected to three-dimensional signal level correction using three-dimensional correction values and corresponding to a position in a horizontal direction and a vertical direction of a pixel on a display screen of an image display unit and the signal level of the pixel data. Thereby, accurate gamma correction is made possible, and horizontal and vertical area information (grid block) can be disposed in an optimum positional relation according to resolution of the screen.

TECHNICAL FIELD

The present invention relates to a nonlinear processing device forsubjecting a video signal to correction by nonlinear processingaccording to characteristics of a display device of an image displayunit for image display based on the video signal, and an image displayapparatus using the nonlinear processing device.

BACKGROUND ART

In supplying a video signal to for example an image display unit as aliquid crystal display panel unit or the like for image display, andobtaining an image based on the video signal, the correction of level ofthe video signal by nonlinear processing according to displaycharacteristics of the image display unit is proposed. Such correctionof the level (voltage level) of the video signal by nonlinear processingis generally referred to as “gamma correction.”

When the image display unit is formed by a liquid crystal display panelunit for image display, for example, a liquid crystal panel included inthe liquid crystal display panel unit displays an image on the basis ofa video signal. The image display is in principle effected by change inlight transmittance of the liquid crystal panel in response to change inthe level of the video signal.

FIG. 2 shows input voltage-light transmittance characteristicsindicating a relation between input voltage V and light transmittance Tof an example of the liquid crystal panel included in the liquid crystaldisplay panel unit for image display. As is clear at a glance, the inputvoltage-light transmittance characteristics are nonlinearcharacteristics. The video signal supplied to the liquid crystal displaypanel unit that makes image display on the liquid crystal panel havingsuch display characteristics is required to be corrected for level tocorrect the nonlinear characteristics.

The level correction made on the video signal in conformity to therequirement is gamma correction. Hence, the gamma correction when theliquid crystal display panel unit for image display is used is nonlinearprocessing correction of the level of the video signal supplied to theliquid crystal display panel unit according to the displaycharacteristics of the liquid crystal display panel unit, or the inputvoltage-light transmittance characteristics of the liquid crystal panelincluded in the liquid crystal display panel unit.

FIG. 1 shows an example of a conventional image display apparatus thatperforms gamma correction of level of a video signal.

In this case, analog/digital (A/D) conversion units 121R, 121G, and 121Bdigitize a red primary color video signal SR, a green primary colorvideo signal SG, and a blue primary color video signal SB, which form acolor video signal, into a digital red primary color signal DR, adigital green primary color signal DG, and a digital blue primary colorsignal DB, respectively.

The digital red primary color signal DR, the digital green primary colorsignal DG, and the digital blue primary color signal DB are supplied toa contrast and brightness adjusting unit 122 to be each adjusted incontrast and brightness. Then, a digital red primary color signal DRA, adigital green primary color signal DGA, and a digital blue primary colorsignal DBA that are adjusted and obtained from the contrast andbrightness adjusting unit 122 are supplied to a white balance adjustingunit 123.

In the white balance adjusting unit 123, the digital red primary colorsignal DRA is adjusted in gain by a gain adjusting unit 124R, andadjusted in direct-current level by a direct-current level adjustingunit 125R, whereby an adjusted digital red primary color signal DRB isobtained from the direct-current level adjusting unit 125R.

The digital green primary color signal DGA is similarly processed by again adjusting unit 124G and a direct-current level adjusting unit 125G.Further, the digital blue primary color signal DBA is processed by again adjusting unit 124B and a direct-current level adjusting unit 125B.

The digital red primary color signal DRB, the digital green primarycolor signal DGB, and the digital blue primary color signal DBB thusobtained have relative direct-current levels therebetween set properly.The white balance adjustment is thus made.

The digital red primary color signal DRB, the digital green primarycolor signal DGB, and the digital blue primary color signal DBB obtainedfrom the white balance adjusting unit 123 are supplied to a gammacorrection unit 126.

In the gamma correction unit 126, the digital red primary color signalDRB is subjected to nonlinear level processing by a nonlinear processingunit 127R.

The digital green primary color signal DGB and the digital blue primarycolor signal DBB are similarly subjected to nonlinear processing bynonlinear processing units 127G and 127B.

The nonlinear processing unit 127R includes a correction signal datatable representing nonlinear characteristics in opposite relation to thedisplay characteristics of a liquid crystal display panel unit 118R tobe described later, that is, the input voltage-light transmittancecharacteristics of a liquid crystal panel included in the liquid crystaldisplay panel unit 118R. The nonlinear processing unit 127R sequentiallycompares the signal level of the digital red primary color signal DRBwith the correction signal data table, and then reads correspondingcorrection signal data. The correction signal data is derived as adigital red primary color signal DRC having a signal level corrected.Thereby the digital red primary color signal DRC derived from thenonlinear processing unit 127R is corrected for signal level bynonlinear processing, that is, gamma-corrected to correct the inputvoltage-light transmittance characteristics as shown in FIG. 2, forexample, of the liquid crystal panel included in the liquid crystaldisplay panel unit 118R.

Similarly, the nonlinear processing unit 127G subjects the digital greenprimary color signal DGB to gamma correction processing corresponding toa liquid crystal panel included in a liquid crystal display panel unit118G, and then outputs a digital green primary color signal DGC.

The nonlinear processing unit 127B also subjects the digital greenprimary color signal DBB to gamma correction processing corresponding toa liquid crystal panel included in a liquid crystal display panel unit118B, and then outputs a digital green primary color signal DBC.

D/A conversion units 128R, 128G, and 128B convert the digital redprimary color signal DRC, the digital green primary color signal DGC,and the digital blue primary color signal DBC that are gamma-correctedand outputted from the gamma correction unit 26 into a gamma-correctedanalog red primary color video signal SRC′, a gamma-corrected analoggreen primary color video signal SGC′, and a gamma-corrected analog blueprimary color video signal SBC′. The gamma-corrected analog red primarycolor video signal SRC′, the gamma-corrected analog green primary colorvideo signal SGC′, and the gamma-corrected analog blue primary colorvideo signal SBC′ are supplied to display driving units 117R, 117G, and117B, respectively.

Thereby a display driving signal SDR′ based on the red primary colorvideo signal SRC′ is obtained from the display driving unit 117R, andsupplied to the liquid crystal display panel unit 118R. Also, a displaydriving signal SDG′ based on the green primary color video signal SGC′is obtained from the display driving unit 117G, and supplied to theliquid crystal display panel unit 118G. Further, a display drivingsignal SDB′ based on the blue primary color video signal SBC′ isobtained from the display driving unit 117B, and supplied to the liquidcrystal display panel unit 118B.

The image display apparatus of FIG. 1 further includes: a timing signalgenerating unit 119 for generating timing signals T1 to T6 on the basisof a horizontal synchronizing signal SH and a vertical synchronizingsignal SV; and a PLL unit 120.

The timing signal generating unit 119 supplies the timing signals T1 toT6 to the display driving units 117R, 117G, and 117B and the liquidcrystal display panel units 118R, 118G, and 118B, respectively, tooperate these parts in predetermined timing.

Thereby the liquid crystal display panel unit 118R is driven by thedisplay driving signal SDR′ from the display driving unit 117R. A redprimary color image corresponding to the gamma-corrected red primarycolor video signal SRC′ is thus displayed on the liquid crystal displaypanel unit 118R.

Similarly, a green primary color image and a blue primary color imagecorresponding to the gamma-corrected green primary color video signalSGC′ and the gamma-corrected blue primary color video signal SBC′ aredisplayed on the liquid crystal display panel units 118G and 118B.

The red primary color image, the green primary color image, and the blueprimary color image thus obtained on the liquid crystal display panelunits 118R, 118G, and 118B, respectively, are projected in a state ofbeing superimposed on each other on a projection screen via a projectionoptical system including a projection lens, for example, whereby a colorimage based on the color video signal formed by the red primary colorvideo signal SR, the green primary color video signal SG, and the blueprimary color video signal SB is obtained on the projection screen.

The conventional image display apparatus can make gamma correction, thatis, in this case, correct the input voltage-light transmittancecharacteristics of the liquid crystal panels included in the liquidcrystal display panel units 118R, 118G, and 118B. However, the gammacorrection in this case is made commonly on pixel data of the digitalvideo signal which pixel data corresponds to each of pixels distributedon the entire image screen obtained on the liquid crystal panel includedin each of the liquid crystal display panel units 118R, 118G, and 118B.

That is, the gamma correction based on the same nonlinearcharacteristics is made on pixel data of the digital video signal whichpixel data corresponds to a pixel at a central portion of the imagescreen obtained on the liquid crystal panel and pixel data of thedigital video signal which pixel data corresponds to a pixel at aperipheral portion of the image screen, for example. Such gammacorrection cannot correct for differences in the input voltage-lighttransmittance characteristics according to the position within thescreen of the liquid crystal panel.

In addition, the gamma correction does not correct undesired variationsin brightness and chromaticity of the red primary color image, the greenprimary color image, and the blue primary color image thus obtained onthe liquid crystal display panel units 118R, 118G, and 118B,respectively, which variations are caused by variations in level of theinput video signal, that is, the red primary color video signal SR, thegreen primary color video signal SG, and the blue primary color videosignal SB.

Accordingly, the present applicant has previously proposed a nonlinearprocessing device and an image display apparatus that can correct theinput voltage-light transmittance characteristics in a horizontal and avertical direction of the screen, that is, according to a position onthe screen, and which can further make correction according to signallevel (Japanese Patent Application No. Hei 9-271598).

This means further correction of gamma-corrected pixel data according tothe position in two-dimensional directions (the horizontal and verticaldirections) on the screen and the level. That is, three-dimensionalcorrection is added to gamma correction processing.

The correction in the horizontal and vertical directions is as follows.

FIG. 3 shows a grid block as horizontal and vertical area informationfor the correction in the horizontal and vertical directions.

The grid block is formed by setting a plurality of areas in a form of agrid in divided units of about 128 pixels, for example, in anX-direction (horizontal direction) and a Y-direction (verticaldirection) on the screen. The grid block is formed by correction valuesC given at points of intersection of horizontal lines and verticallines.

Suppose that coordinates 0 to p are given in the X-direction, and thatcoordinates 0 to q are given in the Y-direction, for example. Thecorrection values shown as C(0, 0), C(0, 1), . . . C(p, q) in FIG. 3 areset at coordinates of the points of intersection indicated by dots.Hence, (p+1)×(q+1) correction values are set.

Thereby, (p×q) areas enclosed by coordinates of four intersections(correction values) are formed. The areas are shown as [1, 1], [1, 2], .. . [p, q].

In the correction in the horizontal and vertical directions added to thegamma correction, first an area in such a grid block to which area pixeldata belongs is detected. After the area is determined, the position ofthe pixel data within the area is determined, and then a two-dimensionalcorrection value is calculated from the four correction values formingthe area. Thereafter, gamma-corrected pixel data is further corrected bythe calculated two-dimensional correction value, whereby the correctionaccording to the horizontal and vertical directions is made possible.

Taking pixel data dxy as an example, it is first determined that thepixel data dxy is included in the area [5, 3], and further where thepixel data dxy is situated within the area [5, 3] is determined.

Since the pixel data dxy is included in the area [5, 3], four correctionvalues C(4, 2), C(5, 2), C(4, 3), and C(5, 3) on the periphery of thearea [5, 3] are used to calculate a two-dimensional correction value onthe basis of distances of the pixel data dxy within the area [5, 3] fromintersection coordinates of the correction values.

Three-dimensional correction is a three-dimensional extension of suchtwo-dimensional correction resulting from addition of signal level on aZ-axis to the two-dimensional correction.

FIG. 4 shows a three-dimensional structure obtained by stacking the gridblock of FIG. 3 in the Z-axis direction.

A number of signal level boundaries 0, 1, . . . r are set in the Z-axisdirection. A two-dimensional grid block as shown in FIG. 3 is set ateach of the level boundaries, whereby a three-dimensional formation ofcorrection values is obtained.

That is, in this case, a correction value C is set at each point ofintersection of three-dimensional coordinates, and C(0, 0, 0) . . . C(p,q, r) are set as correction values C. Hence, (p+1)×(q+1)×(r+1)correction values are set.

Further, level blocks L1, L2, . . . Lr are formed between the levelboundaries.

A block formed by each of the areas [1, 1] . . . [p, q] as shown in FIG.3 in the grid block penetrating through the level blocks in theZ-direction is referred to as a position block. FIG. 6 shows a positionblock A[i, j], which will be described later in detail.

In this case, in the three-dimensional correction in the horizontal andvertical directions and according to level added to the gammacorrection, a level block and a position block including the pixel dataare first determined.

After the level block and the position block are determined, the levelof the pixel data within the level block and the position of the pixeldata within the position block are determined, and then athree-dimensional correction value is calculated. In this case, pixeldata is situated in a three-dimensional block where a position block anda level block intersect each other. The three-dimensional block isenclosed by eight correction values C. Thus, a three-dimensionalcorrection value corresponding to the pixel data is calculated from theeight correction values according to the position and level of the pixeldata within the three-dimensional block. Gamma-corrected pixel data isfurther corrected by the calculated three-dimensional correction value,whereby the correction in the horizontal and vertical directions andaccording to the signal level is made possible.

In obtaining a video signal nonlinearly corrected by such techniquespreviously proposed by the present applicant, the nonlinearly correctedvideo signal is corrected for undesired variations in brightness andchromaticity according to the horizontal and vertical position on thedisplay screen, and further for undesired variations in brightness andchromaticity of the display screen obtained on the image display unitwhich variations are caused by variations in level of the original videosignal.

However, when the video signal is to be linearly corrected with higheraccuracy by applying the techniques previously proposed by the presentapplicant, there are problems as described in the following which arecaused by difference in characteristics between various display devicesfor the image display unit.

(1) Generally, nonlinear characteristics of output level with respect toinput vary with each display device.

There are various kinds of display devices such for example as LCD(Liquid Crystal Display), CRT (Cathode Ray Tube), PDP (Plasma DisplayPanel), PALC (Plasma Addressed Liquid Crystal), and DLP (Digital LightProcessing). They have different nonlinear characteristics.

Also, even individual display devices of the same kind have varyingnonlinear characteristics. When a plurality of liquid crystal panels areconsidered, for example, the plurality of liquid crystal panels haveroughly the same nonlinear characteristics, but the nonlinearcharacteristics vary with each individual liquid crystal panel.

When three-dimensional correction as described above is made in such asituation, the level boundaries in the Z-axis direction are notnecessarily set appropriately, so that favorable effects of thethree-dimensional correction may not be obtained.

When a nonlinear processing device including the three-dimensionalcorrection is applied to circuit systems of various display devices, forexample, the nonlinear processing device cannot deal with difference innonlinear characteristics of each display device. Even when thenonlinear processing device is included in display devices of the samekind, the nonlinear processing device cannot deal with difference innonlinear characteristics of each individual display device.

As a result of the above, accuracy of three-dimensional correction forgamma correction can deteriorate.

(2) Image resolution generally varies with each display device.

It is desirable that an upper edge, a lower edge, a left edge, and aright edge of the grid block of correction values in the horizontal andvertical two-dimensional directions coincide with those of an imagearea.

That is, it is ideal if coordinates (0, 0), (p, 0), (0, q), and (p, q)of four corners of a grid block of FIG. 23, for example, represent fourcorners of an image area as they are.

When consideration is given to a case where a circuit for making theabove-described nonlinear correction is included in image displayapparatus as a signal processing system for various display devices, thedisplay devices employed are of course expected to have various screenresolutions. Ideally, it is desirable that size of the grid block bechanged according to the resolution to coincide with that of the imagearea.

However, this requires preparation of enormous amounts of correctionvalues and coordinate values in correspondence with various grid blocksizes, thus greatly increasing the scale of the circuit. Thus, thecoordinates (and correction values) of the grid block are usually fixedso that display devices of various resolutions are dealt with by asingle grid block.

This, however, results in a vertically and horizontally asymmetricrelation between the grid block and the image area. Thus, correction ofnonlinear characteristics in the two-dimensional directions may resultin an unnatural image state.

When a nonlinear correction circuit in which a grid block provided for adevice with a high resolution is set is incorporated in a signalprocessing system for a display device with a low resolution, forexample, a relation between the grid block and the image area is asshown in FIG. 19A.

That is, since the grid block and the image area are made to correspondto each other by using coordinates (0, 0) as an origin, amounts ofdisplacement between the grid block and the image area are asymmetric inboth the horizontal direction and the vertical direction. This resultsin an unnatural image.

DISCLOSURE OF INVENTION

In view of the above, it is an object of the present invention toprovide a nonlinear processing device that can deal with difference innonlinear characteristics according to the type of display device or theindividual display device. It is another object of the present inventionto enable such a nonlinear processing device to be realized by a circuitconfiguration on a relatively small scale. It is another object of thepresent invention to provide an image display apparatus including such anonlinear processing device.

In view of the above, it is a further object of the present invention toeliminate unnaturalness of an image as a result of correction in anonlinear processing device, which performs correction in a horizontaland a vertical direction of a result of nonlinear correction processingusing a fixed grid block, even when resolution of a display device doesnot match the grid block. It is a further object of the presentinvention to provide an image display apparatus including such anonlinear processing device.

According to the present invention, there is provided a nonlinearprocessing device including nonlinear processing means for correcting avideo signal for signal level by nonlinear processing according todisplay characteristics of an image display unit for making imagedisplay based on the video signal, horizontal and vertical positiondetermining means for determining a position in a horizontal directionand a vertical direction of a pixel in the video signal, leveldetermining means for determining signal level of the pixel in the videosignal, level boundary setting means for variably setting a levelboundary value used in determination by the level determining means,three-dimensional correction means for generating a three-dimensionalsignal level correction value according to the position in thehorizontal direction and the vertical direction determined by thehorizontal and vertical position determining means and the signal leveldetermined by the level determining means, and thereby makingthree-dimensional correction of the video signal, and combining meansfor combining the video signal corrected by the nonlinear processingmeans with the video signal corrected by the three-dimensionalcorrection means for output.

According to the present invention, there is provided an image displayapparatus including nonlinear processing means for correcting a videosignal for signal level by nonlinear processing according to displaycharacteristics of an image display unit for making image display basedon the video signal, horizontal and vertical position determining meansfor determining a position in a horizontal direction and a verticaldirection of a pixel in the video signal, level determining means fordetermining signal level of the pixel in the video signal, levelboundary setting means for variably setting a level boundary value usedin determination by the level determining means, three-dimensionalcorrection means for generating a three-dimensional signal levelcorrection value according to the position in the horizontal directionand the vertical direction determined by the horizontal and verticalposition determining means and the signal level determined by the leveldetermining means, and thereby making three-dimensional correction ofthe video signal, combining means for combining the video signalcorrected by the nonlinear processing means with the video signalcorrected by the three-dimensional correction means for output, andimage display means having the image display unit for making imagedisplay based on a video signal outputted from the combining means.

In the nonlinear processing device or the image display apparatus, thelevel boundary setting means has a register for storing a level boundaryvalue, and by rewriting the level boundary value of the register, thelevel boundary value used for determination by the level determiningmeans is variably set.

Alternatively, the level boundary setting means stores various levelboundary values, and by supplying the level determining means with alevel boundary value selected from the stored level boundary values, thelevel boundary value used for determination by the level determiningmeans is set.

The nonlinear processing device or the image display apparatus furtherincludes boundary value offsetting means for supplying an offset valueto the level determining means and thereby offsetting the level boundaryvalue set to be used for determination by the level determining means.

Thus, according to the present invention, the video signal nonlinearlyprocessed (gamma-corrected) by the nonlinear processing means issubjected to three-dimensional signal level correction using thethree-dimensional correction value and corresponding to the position inthe horizontal direction and the vertical direction of the pixel on adisplay screen of the image display unit and the signal level of thepixel data.

Since the level boundary value for the signal level in thethree-dimensional correction can be variably set, it is possible to makeoptimum three-dimensional correction of nonlinear characteristics ofvarious types of display devices and each individual display device.

Further, according to the present invention, there is provided anonlinear processing device including nonlinear processing means forcorrecting a video signal for signal level by nonlinear processingaccording to display characteristics of an image display unit for makingimage display based on the video signal, horizontal and verticalposition determining means for determining a position in a horizontaldirection and a vertical direction of a pixel in the video signal,horizontal and vertical relative position changing means for changing arelative position relation between horizontal and vertical areainformation used for determination by the horizontal and verticalposition determining means and an image area of the video signal for thedetermination by the horizontal and vertical position determining means,level determining means for determining signal level of the pixel in thevideo signal, three-dimensional correction means for generating athree-dimensional signal level correction value according to theposition in the horizontal direction and the vertical directiondetermined by the horizontal and vertical position determining means andthe signal level determined by the level determining means, and therebymaking three-dimensional correction of the video signal, and combiningmeans for combining the video signal corrected by the nonlinearprocessing means with the video signal corrected by thethree-dimensional correction means for output.

Further, according to the present invention, there is provided an imagedisplay apparatus including nonlinear processing means for correcting avideo signal for signal level by nonlinear processing according todisplay characteristics of an image display unit for making imagedisplay based on the video signal, horizontal and vertical positiondetermining means for determining a position in a horizontal directionand a vertical direction of a pixel in the video signal, horizontal andvertical relative position changing means for changing a relativeposition relation between horizontal and vertical area information usedfor determination by the horizontal and vertical position determiningmeans and an image area of the video signal for the determination by thehorizontal and vertical position determining means, level determiningmeans for determining signal level of the pixel in the video signal,three-dimensional correction means for generating a three-dimensionalsignal level correction value according to the position in thehorizontal direction and the vertical direction determined by thehorizontal and vertical position determining means and the signal leveldetermined by the level determining means, and thereby makingthree-dimensional correction of the video signal, combining means forcombining the video signal corrected by the nonlinear processing meanswith the video signal corrected by the three-dimensional correctionmeans for output, and image display means having the image display unitfor making image display based on a video signal outputted from thecombining means.

In the nonlinear processing device or the image display apparatus, thehorizontal and vertical relative position changing means changes therelative position relation by giving an offset value in the horizontaldirection and an offset value in the vertical direction to thehorizontal and vertical position determining means.

Further, the horizontal and vertical relative position changing meanschanges the relative position relation such that an amount ofdisplacement between the horizontal and vertical area information andthe image area is averaged in the vertical direction or the horizontaldirection.

Thus, according to the present invention, the video signal nonlinearlyprocessed (gamma-corrected) by the nonlinear processing means issubjected to three-dimensional signal level correction using thethree-dimensional correction value and corresponding to the position inthe horizontal direction and the vertical direction of the pixel on adisplay screen of the image display unit and the signal level of thepixel data.

Since the positional relation between the horizontal and vertical areainformation (grid block) of two-dimensional correction values in thehorizontal and vertical directions in the three-dimensional correctionand the image area can be variably set, it is possible to deal withresolutions of various kinds of display devices and eliminateunnaturalness of a result of the correction.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a block diagram of a conventional image display apparatus;

FIG. 2 is a diagram of assistance in explaining input voltage-lighttransmittance characteristics of a liquid crystal panel;

FIG. 3 is a diagram of assistance in explaining two-dimensionalcorrection of gamma characteristics;

FIG. 4 is a diagram of assistance in explaining three-dimensionalcorrection of gamma characteristics;

FIG. 5 is a block diagram of an image display apparatus according to anembodiment of the present invention;

FIG. 6 is a diagram of assistance in explaining a position blockaccording to the embodiment;

FIG. 7 is a diagram of assistance in explaining a level block accordingto the embodiment;

FIG. 8 is a diagram of assistance in explaining a position within theposition block according to the embodiment;

FIG. 9 is a diagram of assistance in explaining a level within the levelblock according to the embodiment;

FIG. 10 is a block diagram of a first example of configuration of anonlinear correction unit according to the embodiment;

FIG. 11 is a block diagram of a level arrangement data storing registerin the first example of configuration of the nonlinear correction unitaccording to the embodiment;

FIGS. 12A, 12B, and 12C are diagrams of assistance in explaining thevariable setting of level boundary values according to the embodiment;

FIG. 13 is a diagram of assistance in explaining an example of thesetting of level boundary values according to the embodiment;

FIG. 14 is a diagram of assistance in explaining an example of thesetting of level boundary values according to the embodiment;

FIG. 15 is a diagram of assistance in explaining an example of thesetting of level boundary values according to the embodiment;

FIG. 16 is a block diagram of a second example of configuration of thenonlinear correction unit according to the embodiment;

FIG. 17 is a block diagram of a level arrangement data selecting unit inthe second example of configuration of the nonlinear correction unitaccording to the embodiment;

FIG. 18 is a block diagram of a third example of configuration of thenonlinear correction unit according to the embodiment;

FIGS. 19A and 19B are diagrams of assistance in explaining theoffsetting of level boundary values in the third and a fourthconfiguration example of the embodiment;

FIG. 20 is a block diagram of the fourth example of configuration of thenonlinear correction unit according to the embodiment;

FIG. 21 is a block diagram of a fifth example of configuration of thenonlinear correction unit according to the embodiment;

FIGS. 22A and 22B are diagrams of assistance in explaining an offset ina horizontal and a vertical direction in the fifth and a sixthconfiguration example of the embodiment;

FIGS. 23A and 23B are diagrams of assistance in explaining a relationbetween an image area and a grid block in the fifth and the sixthconfiguration example of the embodiment; and

FIG. 24 is a block diagram of the sixth example of configuration of thenonlinear correction unit according to the embodiment.

BEST MODE FOR CARRYING OUT THE INVENTION

A preferred embodiment of the present invention will hereinafter bedescribed in the following order.

-   -   1. Configuration of image display apparatus    -   2. Position blocks and level blocks    -   3. First example of configuration of nonlinear correction unit    -   4. Second example of configuration of nonlinear correction unit    -   5. Third example of configuration of nonlinear correction unit    -   6. Fourth example of configuration of nonlinear correction unit    -   7. Fifth example of configuration of nonlinear correction unit    -   8. Sixth example of configuration of nonlinear correction unit        1. Configuration of Image Display Apparatus

An example of configuration of an image display apparatus according tothe embodiment will first be described with reference to FIG. 5.

The image display apparatus is an example of configuration of an imagedisplay apparatus that employs a liquid crystal display panel as adisplay device, and digitizes a video signal and then performs signalprocessing such as white balance and nonlinear processing.

The image display apparatus is characterized especially by theconfiguration of a nonlinear correction unit 16. The configuration ofthe nonlinear correction unit 16 will be described later in detail as afirst to a sixth configuration example.

Various configurations are conceivable for a signal processing system instages preceding the nonlinear correction unit 16, a signal processingsystem in stages succeeding the nonlinear correction unit 16, a kind ofdisplay device employed, and the like in the image display apparatusaccording to the present invention. Therefore, the image displayapparatus according to the present invention is not limited to theexample of configuration of the image display apparatus to be describedbelow.

In the example shown in FIG. 5, A/D conversion units 11R, 11G, and 11Bdigitize a red primary color video signal SR, a green primary colorvideo signal SG, and a blue primary color video signal SB, which form acolor video signal, into a digital red primary color signal DR, adigital green primary color signal DG, and-a digital blue primary colorsignal DB, respectively.

The digital red primary color signal DR, the digital green primary colorsignal DG, and the digital blue primary color signal DB are supplied toa contrast and brightness adjusting unit 12 to be each adjusted incontrast and brightness. Then, a digital red primary color signal DRA, adigital green primary color signal DGA, and a digital blue primary colorsignal DBA that are adjusted and obtained from the contrast andbrightness adjusting unit 12 are supplied to a white balance adjustingunit 13.

In the white balance adjusting unit 13, the digital red primary colorsignal DRA is adjusted in gain by a gain adjusting unit 14R, andadjusted in direct-current level by a direct-current level adjustingunit 15R, whereby an adjusted digital red primary color signal DRB isobtained.

Similarly, the digital green primary color signal DGA is adjusted ingain by a gain adjusting unit 14G, and adjusted in direct-current levelby a direct-current level adjusting unit 15G, whereby an adjusteddigital green primary color signal DGB is obtained.

Further, similarly, the digital blue primary color signal DBA isadjusted in gain by a gain adjusting unit 14B, and adjusted indirect-current level by a direct-current level adjusting unit 15B,whereby an adjusted digital blue primary color signal DBB is obtained.

The digital red primary color signal DRB, the digital green primarycolor signal DGB, and the digital blue primary color signal DBB thusobtained have relative direct-current levels therebetween set properly.The white balance adjustment is thus made.

The digital red primary color signal DRB, the digital green primarycolor signal DGB, and the digital blue primary color signal DBB obtainedfrom the white balance adjusting unit 13 are supplied to the nonlinearcorrection unit 16.

In the nonlinear correction unit 16, the digital red primary colorsignal DRB is supplied to a nonlinear processing unit 17R and athree-dimensional correction unit 18R; the digital green primary colorsignal DGB is supplied to a nonlinear processing unit 17G and athree-dimensional correction unit 18R; and the digital blue primarycolor signal DBB is supplied to a nonlinear processing unit 17B and athree-dimensional correction unit 18B.

Further, the configuration example shown in FIG. 5 is provided with atiming signal generating unit 53 and address data generating units 55R,55G, and 55B, which are supplied with a horizontal synchronizing signalSH and a vertical synchronizing signal SV in the color video signalformed by the red primary color video signal SR, the green primary colorvideo signal SG, and the blue primary color video signal SB.

The timing signal generating unit 53 is connected with a PLL unit 54.

The red primary color video signal SR, the green primary color videosignal SG, and the blue primary color video signal SB are each insynchronism with the horizontal synchronizing signal SH and the verticalsynchronizing signal SV supplied to each of the timing signal generatingunit 53 and the address data generating units 55R, 55G, and 55B.

The timing signal generating unit 53 generates timing signals T1 to T6on the basis of the horizontal synchronizing signal SH and the verticalsynchronizing signal SV.

In response to the horizontal synchronizing signal SH and the verticalsynchronizing signal SV, the address data generating unit 55R generateshorizontal address data QRH and vertical address data QRV correspondingto each pixel of an image screen obtained on a liquid crystal panelincluded in a liquid crystal display panel unit 52R to be describedlater. The address data generating unit 55R supplies the horizontaladdress data QRH and the vertical address data QRV to thethree-dimensional correction unit 18R in the digital nonlinearcorrection unit 16.

In response to the horizontal synchronizing signal SH and the verticalsynchronizing signal SV, the address data generating unit 55G generateshorizontal address data QGH and vertical address data QGV correspondingto each pixel of an image screen obtained on a liquid crystal panelwithin a liquid crystal display panel unit 52G. The address datagenerating unit 55G supplies the horizontal address data QGH and thevertical address data QGV to the three-dimensional correction unit 18G.

In response to the horizontal synchronizing signal SH and the verticalsynchronizing signal SV, the address data generating unit 55B generateshorizontal address data QBH and vertical address data QBV correspondingto each pixel of an image screen obtained on a liquid crystal panelwithin a liquid crystal display panel unit 52B. The address datagenerating unit 55B supplies the horizontal address data QBH and thevertical address data QBV to the three-dimensional correction unit 18B.

The nonlinear correction unit 16 has the nonlinear processing unit 17R,the three-dimensional correction unit 18R, a combining unit 19R, and aROM 20R as parts corresponding to the digital red primary color signalDRB inputted to the nonlinear correction unit 16.

Further, the nonlinear correction unit 16 has the nonlinear processingunit 17G, the three-dimensional correction unit 18G, a combining unit19G, and a ROM 20G as parts corresponding to the digital green primarycolor signal DGB.

Further, the nonlinear correction unit 16 has the nonlinear processingunit 17B, the three-dimensional correction unit 18B, a combining unit19B, and a ROM 20B as parts corresponding to the digital blue primarycolor signal DBB.

The nonlinear processing unit 17R, the three-dimensional correction unit18R, the combining unit 19R, and the ROM 20R corresponding to thedigital red primary color signal DRB will be described.

The nonlinear processing unit 17R stores gamma correction datarepresenting nonlinear characteristics in opposite relation to thedisplay characteristics of the liquid crystal display panel unit 52R,that is, the input voltage-light transmittance characteristics of theliquid crystal panel included in the liquid crystal display panel unit52R. The nonlinear processing unit 17R reads gamma correction datacorresponding to a signal level of the digital red primary color signalDRB obtained from the white balance adjusting unit 13. The gammacorrection data is derived as a digital red primary color signal DRChaving a signal level resulting from nonlinear processing (gammacorrection).

Thereby the digital red primary color signal DRC derived from thenonlinear processing unit 17R is gamma-corrected to correct the inputvoltage-light transmittance characteristics shown in FIG. 2, forexample, of the liquid crystal panel included in the liquid crystaldisplay panel unit 52R. The digital red primary color signal DRC issupplied to the combining unit 19R.

In the meantime, according to the horizontal address data QRH and thevertical address data QRV from the address data generating unit 55R, thethree-dimensional correction unit 18R subjects a signal level of eachpiece of pixel data in the digital red primary color signal DRB obtainedfrom the white balance adjusting unit 13 to three-dimensional correctioncorresponding to a position in a horizontal direction and a verticaldirection of a pixel of an image screen obtained on the liquid crystalpanel included in the liquid crystal display panel unit 52R, which pixelcorresponds to the pixel data, and the signal level of the pixel data inthe digital red primary color signal DRB.

Each correction value C in a three-dimensional coordinate space in ahorizontal direction, a vertical direction, and a level direction forthe three-dimensional correction is stored in a ROM 20R. Thethree-dimensional correction unit 18R loads the correction value C ofthe ROM 20R for use in calculation.

Then, a three-dimensionally corrected digital red primary color signalDRS formed by each piece of pixel data whose signal level isthree-dimensionally corrected is supplied from the three-dimensionalcorrection unit 18R to the combining unit 19R.

The combining unit 19R combines the digital red primary color signal DRCwhose signal level is corrected by nonlinear processing, the digital redprimary color signal DRC being obtained from the nonlinear processingunit 17R, with the three-dimensionally corrected digital red primarycolor signal DRS whose signal level is three-dimensionally corrected,the three-dimensionally corrected digital red primary color signal DRSbeing obtained from the three-dimensional correction unit 18R. Thereby adigital red primary color signal DRD that is gamma-corrected and furtherthree-dimensionally corrected is outputted from the combining unit 19R.

The nonlinear processing unit 17G, the three-dimensional correction unit18G, the combining unit 19G, the ROM 20G, and the address datagenerating unit 55G corresponding to the digital green primary colorsignal DGB each function in the same manner as described above.

Specifically, the nonlinear processing unit 47G makes gamma correctionfor the input voltage-light transmittance characteristics of the liquidcrystal panel included in the liquid crystal display panel unit 52G. Agamma-corrected digital green primary color signal DGC is derived andsupplied to the combining unit 49G.

Using the horizontal address data QGH and the vertical address data QGVfrom the address data generating unit 55G, the three-dimensionalcorrection unit 18G subjects the digital green primary color signal DGBto three-dimensional correction corresponding to a position in ahorizontal direction and a vertical direction of pixel data and a signallevel of the pixel data in the digital green primary color signal DGB.Then, a three-dimensionally corrected digital green primary color signalDGS is supplied to the combining unit 49G.

The combining unit 49G combines the digital green primary color signalDGC obtained from the nonlinear processing unit 47G with thethree-dimensionally corrected digital green primary color signal DGSobtained from the three-dimensional correction unit 48G, and thenoutputs the result. Thereby a digital green primary color signal DGDthat is gamma-corrected and further three-dimensionally corrected isoutputted.

The nonlinear processing unit 17B, the three-dimensional correction unit18B, the combining unit 19B, the ROM 20B, and the address datagenerating unit 55B corresponding to the digital blue primary colorsignal DBB each function in the same manner as described above.

Specifically, the nonlinear processing unit 47B makes gamma correctionfor the input voltage-light transmittance characteristics of the liquidcrystal panel included in the liquid crystal display panel unit 52B. Agamma-corrected digital blue primary color signal DBC is derived andsupplied to the combining unit 49B.

Using the horizontal address data QBH and the vertical address data QBVfrom the address data generating unit 55B, the three-dimensionalcorrection unit 18B subjects the digital green primary color signal DBBto three-dimensional correction corresponding to a position in ahorizontal direction and a vertical direction of pixel data and a signallevel of the pixel data in the digital blue primary color signal DBB.Then, a three-dimensionally corrected digital blue primary color signalDBS is supplied to the combining unit 49B.

The combining unit 49B combines the digital blue primary color signalDBC obtained from the nonlinear processing unit 47B with thethree-dimensionally corrected digital blue primary color signal DBSobtained from the three-dimensional correction unit 48B, and thenoutputs the result. Thereby a digital blue primary color signal DBD thatis gamma-corrected and further three-dimensionally corrected isoutputted.

Then, a D/A conversion unit 50R converts the nonlinearly correcteddigital red primary color signal DRD obtained from the digital nonlinearcorrection unit 16 into a nonlinearly corrected analog red primary colorvideo signal SRD. The nonlinearly corrected analog red primary colorvideo signal SRD is supplied to a display driving unit 51R.

Similarly, a D/A conversion unit 50G converts the nonlinearly correcteddigital green primary color signal DGD into a nonlinearly correctedanalog green primary color video signal SGD. The nonlinearly correctedanalog green primary color video signal SGD is supplied to a displaydriving unit 51G.

Further, a D/A conversion unit 50B converts the nonlinearly correcteddigital blue primary color signal DBD into a nonlinearly correctedanalog blue primary color video signal SBD. The nonlinearly correctedanalog blue primary color video signal SBD is supplied to a displaydriving unit 51B.

The display driving unit 51R is connected to the liquid crystal displaypanel unit 52R. The display driving unit 51R and the liquid crystaldisplay panel unit 52R are supplied with the timing signals T1 and T4,respectively, from the timing signal generating unit 53. In response tothe timing signals T1 and T4, the display driving unit 51R and theliquid crystal display panel unit 52R operate in preset timing.

Thereby a display driving signal SPR based on the red primary colorvideo signal SRD is obtained from the display driving unit 51R, andsupplied to the liquid crystal display panel unit 52R. A red primarycolor image corresponding to the nonlinearly corrected red primary colorvideo signal SRD obtained from the D/A conversion unit 50R is displayedon the liquid crystal panel included in the liquid crystal display panelunit 52R.

Also, the display driving unit 51G is connected to the liquid crystaldisplay panel unit 52G. The display driving unit 51G and the liquidcrystal display panel unit 52G are supplied with the timing signals T2and T5, respectively, from the timing signal generating unit 53. Inresponse to the timing signals T2 and T5, the display driving unit 51Gand the liquid crystal display panel unit 52G operate in preset timing.

Thereby a display driving signal SPG based on the green primary colorvideo signal SGD is obtained from the display driving unit 51G, andsupplied to the liquid crystal display panel unit 52G. A green primarycolor image corresponding to the nonlinearly corrected green primarycolor video signal SGD obtained from the D/A conversion unit 50G isdisplayed on the liquid crystal panel included in the liquid crystaldisplay panel unit 52G.

Further, the display driving unit 51B is connected to the liquid crystaldisplay panel unit 52B. The display driving unit 51B and the liquidcrystal display panel unit 52B are supplied with the timing signals T3and T6, respectively, from the timing signal generating unit 53. Inresponse to the timing signals T3 and T6, the display driving unit 51Band the liquid crystal display panel unit 52B operate in preset timing.

Thereby a display driving signal SPB based on the blue primary colorvideo signal SBD is obtained from the display driving unit 51B, andsupplied to the liquid crystal display panel unit 52B. A blue primarycolor image corresponding to the nonlinearly corrected blue primarycolor video signal SBD obtained from the D/A conversion unit 50B isdisplayed on the liquid crystal panel included in the liquid crystaldisplay panel unit 52B.

The red primary color image, the green primary color image, and the blueprimary color image thus obtained in the liquid crystal display panelunits 52R, 52G, and 52B, respectively, are projected in a state of beingsuperimposed on each other on a projection screen via a projectionoptical system including a projection lens, for example, whereby a colorimage based on the color video signal formed by the red primary colorvideo signal SR, the green primary color video signal SG, and the blueprimary color video signal SB is obtained on the projection screen.

The red primary color image, the green primary color image, and the blueprimary color image obtained in the liquid crystal display panel units52R, 52G, and 52B, respectively, are based on the digital red primarycolor signal DRD, the digital green primary color signal DGD, and thedigital blue primary color signal DBD, respectively, which arenonlinearly corrected and obtained from the nonlinear correction unit16. The nonlinear correction in this example includes the gammacorrection made to correct the input voltage-light transmittancecharacteristics shown in FIG. 2, for example, of the liquid crystalpanels included in the liquid crystal display panel units 52R, 52G, and52B, and the three-dimensional correction made for the signal level ofeach piece of pixel data in the digital red primary color signal DRB,the digital green primary color signal DGB, and the digital blue primarycolor signal DBB, the three-dimensional correction corresponding to theposition in the horizontal direction and the vertical direction and thesignal level of the pixel data. Thereby not only undesired variations onthe display screen due to difference in display characteristicsaccording to the position on the image screen of the liquid crystalpanel included in the liquid crystal display panel unit 52R, 52G, or52B, but also undesired variations in brightness and chromaticity of thedisplay screen caused by variations in level of the original analogvideo signal, that is, the red primary color video signal SR, the greenprimary color video signal SG, or the blue primary color video signal SBare properly corrected.

A CPU 1, a ROM 2, and a RAM 3 are shown in FIG. 5. The CPU 1 functionsas a unit for controlling the operation of the image display apparatus.The ROM 2 stores an operating program of the CPU 1, various controlconstants and the like. The RAM 3 is used to store various controlcoefficients and used as a work area for calculation and the like.

The operation of the contrast and brightness adjusting unit 12, thewhite balance adjusting unit 13, the nonlinear correction unit 16, thetiming signal generating unit 53, and the like in particular in thecircuit system shown in FIG. 5 is controlled.

For example, processing such as setting of adjustment coefficients inthe contrast and brightness adjusting unit 12 and the white balanceadjusting unit 13 and setting of register coefficients in thethree-dimensional correction units 18R, 18G, and 18B of the nonlinearcorrection unit 16 or supplying selection control signals to thethree-dimensional correction units 18R, 18G, and 18B is performed. Thecontrol of the three-dimensional correction units 18R, 18G, and 18B willbe mentioned in the first to sixth configuration examples to bedescribed later.

As described above, it is to be noted that the image display apparatusaccording to the present invention is characterized by the nonlinearcorrection unit 16, and that the other signal processing systems, thekind of display device employed and the like in the image displayapparatus according to the present invention are not limited to theexample of FIG. 5.

As a signal processing circuit, a configuration is conceivable in whicha frame memory, a pixel count conversion processing unit and the likeare provided between the A/D conversion units 11R, 11G, and 11B and thecontrast and brightness adjusting unit 12, for example.

Further, as a display device, all kinds of display devices areconceivable, such for example as CRT (Cathode Ray Tube), PDP (PlasmaDisplay Panel), PALC (Plasma Addressed Liquid Crystal), and DLP (DigitalLight Processing). The signal processing systems are of course changedwhere necessary according to a display device employed.

2. Position Blocks and Level Blocks

The gamma correction and the three-dimensional correction will bedescribed later in the first to sixth examples of configuration of thenonlinear correction unit 16. In the following, however, the concept ofposition blocks and level blocks used in the three-dimensionalcorrection will first be described.

As described with reference to FIG. 3 and FIG. 4, for three-dimensionalcorrection, a correction value is set at coordinates of each point ofintersection of three-dimensional coordinates based on an X-axis, aY-axis, and a Z-axis in a horizontal, a vertical, and a level direction.

Specifically, regarding a horizontal and a vertical direction of ascreen, a plurality of areas in a form of a grid are set as atwo-dimensional grid block in divided units of about 128 pixels, forexample, in an X-direction (horizontal direction) and a Y-direction(vertical direction) on the screen. Coordinates 0 to p are given in theX-direction, and coordinates 0 to q are given in the Y-direction, forexample.

Further, a number of signal level boundaries 0, 1, . . . r are set in aZ-axis direction. A two-dimensional grid block is set at each levelboundary, whereby a three-dimensional formation of correction values isobtained.

That is, a correction value C is set at each point of intersection ofthree-dimensional coordinates, and C(0, 0, 0) . . . C(p, q, r) are setas correction values C. Hence, (p+1)×(q+1)×(r+1) correction values areset.

Further, level blocks L1, L2, . . . Lr are formed between the levelboundaries.

A block formed by each of areas [1, 1] . . . [p, q] as shown in FIG. 3in the grid block penetrating through the level blocks in theZ-direction is referred to as a position block.

FIG. 6 shows a three-dimensional space in which C(0, 0, 0) . . . C(p, q,r) are set as correction values C. That is, the three-dimensional spaceis a three-dimensional structure in which a grid block formed with Xcoordinates 0, 1, . . . i−1, i, . . . p and Y coordinates 0, 1, . . .j−1, j, . . . q is formed at each level boundary 0, 1, . . . k, k+1, . .. r in the level direction.

Considering an area indicated by X coordinate values i−1 and i and Ycoordinate values j−1 and j, a position block A[i, j] is a blockpenetrating from an area [i, j] at a level 0 to an area [i, j] at alevel r, as shown in FIG. 6.

That is, the position block A[i, j] includes C(i−1, j−1, 0), C(i, j−1,0), C(i−1, j, 0), C(i, j, 0), . . . C(i−1, j−1, r), C(i, j−1, r), C(i−1,j, r), and C(i, j, r) as correction values C. This is a block fordetermining an area (position on the screen) in a two-dimensional gridblock regardless of the level (Z coordinate).

Hence, a position block can basically be specified by correction valuesC(i−1, j−1), C(i, j−1), C(i−1, j), and C(i, j) at points of intersectionof two-dimensional coordinates.

Level blocks L1, L2, . . . Lr are shown in FIG. 4. A level block Lrefers to a space sandwiched between grid blocks at two level boundaryvalues.

FIG. 7 shows a level block Lk. This is a space sandwiched between a gridblock at a level boundary value k, that is, a two-dimensional spaceenclosed by correction values C(0, 0, k), C(p, 0, k), C(0, q, k), andC(p, q, k) and a grid block at a level boundary value k−1, that is, atwo-dimensional space enclosed by correction values C(0, 0, k−1), C(p,0, k−1), C(0, q, k−1), and C(p, q, k−1).

Hence, a level block L is a block for determining levels divided bylevel boundary values which levels include the signal level of pixeldata, regardless of the area (position on the screen) in the grid block.

In three-dimensional correction processing to be described later, theposition block and the level block of pixel data are determined, andfurther the position of the pixel data within the position block and thelevel of the pixel data within the level block are determined.

A position within a position block will be described with reference toFIG. 8.

FIG. 8 shows a position block A[i, j]. Consideration will now be givento pixel data dxy included in the position block A[i, j]. Suppose thatan X coordinate value of the pixel data dxy is dx and a Y coordinatevalue of the pixel data dxy is dy.

In this case, suppose that a distance from an X coordinate value i−1 todx is b and a distance from an X coordinate value i to dx is b′. Also,suppose that a distance from a Y coordinate value j−1 to dy is c and adistance from a Y coordinate value j to dy is c′.

The distances b, b′, c, and c′ are information that can indicate thedistance from each of the correction values C(i−1, j−1), C(i, j−1),C(i−1, j), and C(i, j) at two-dimensional coordinates to the pixel datadxy.

For example, it is indicated that from a viewpoint of the correctionvalue C(i−1, j−1), the pixel data dxy is situated at a position at thedistance b in the X-direction and at the distance c in the Y-direction.

Thus, the distances b, b′, c, and c′ are information that can indicatethe distances from the four correction values C to the pixel data dxy.The distances b, b′, c, and c′ are therefore information for calculatinga correction value in the horizontal and vertical direction at theposition of the pixel data dxy from the set correction values C(i−1,j−1), C(i, j−1), C(i−1, j), and C(i, j).

A position within a position block is thus information indicated bydistances from four correction values of a position block.

A level within a level block will next be described with reference toFIG. 9.

FIG. 9 shows a level block Lk only by a Z-axis. The level block Lk is aspace in a Z-axis direction between level boundary values k and k−1.Consideration will now be given to pixel data included in the levelblock Lk. Suppose that a Z coordinate value of the pixel data is dz.

In this case, suppose that on the Z coordinate, a distance from thelevel boundary value k−1 to dz is a and a distance from the levelboundary value k to dz is a′.

The distances a and a′ are information that can indicate the distancefrom each of correction values C at the level boundary value k−1 and thelevel boundary value k to the pixel data dz.

When consideration is given to a combination of the position within theposition block and the level within the level block as described above,it is understood that the distances a, a′, b, b′, c, and c′ areinformation that can define the position (distance) of the pixel data asviewed from each of the eight correction values in the three-dimensionalsection where the position block and the level block intersect eachother.

That is, when the information of the distances a, a′, b, b′, c, and c′is obtained as the position within the position block and the levelwithin the level block, a correction value corresponding to the positionof the pixel data in the three-dimensional space can be calculated fromthe eight correction values forming the three-dimensional space.

3. First Example of Configuration of Nonlinear Correction Unit

Examples of configuration of the nonlinear correction unit 16 in FIG. 5will hereinafter be described one by one as a first to a sixthconfiguration example.

In each of the configuration examples, the configuration and operationof the nonlinear processing unit 17R, the three-dimensional correctionunit 18R, the combining unit 19R, and the ROM 20R corresponding to thedigital red primary color signal DRB will be described.

The configuration and operation of the nonlinear processing unit 17G,the three-dimensional correction unit 18G, the combining unit 19G, andthe ROM 20G corresponding to the digital green primary color signal DGBor the configuration and operation of the nonlinear processing unit 17B,the three-dimensional correction unit 18B, the combining unit 19B, andthe ROM 20B corresponding to the digital blue primary color signal DBBare substantially the same, and therefore their description will beomitted.

As a first example of configuration of the nonlinear correction unit 16,FIG. 10 shows a part for processing the digital red primary color signalDRB in the nonlinear correction unit 16 shown in FIG. 5, that is, a partincluding the nonlinear processing unit 17R, the three-dimensionalcorrection unit 18R, the combining unit 19R, and the ROM 20R, and theaddress data generating unit 55R connected to the part as a concreteexample of configuration of the nonlinear processing unit 17R and thethree-dimensional correction unit 18R.

The nonlinear processing unit 17R includes: a look-up table 61 formed bya dual port RAM, for example; a gamma correction data generating unit62; and a gamma correction data storing unit 63 formed by a ROM, forexample.

The three-dimensional correction unit 18R includes: a level blockdetermination processing unit 65; an intra-level block level calculationprocessing unit 66; a three-dimensional correction data generating unit70; a three-dimensional interpolation processing unit 71; a positionblock determination processing unit 72; an intra-position block positioncalculation processing unit 73; an intra-position block correction dataforming unit 74; a correction data storing unit 75 formed by a dual portRAM, for example; an intra-position block correction data storingregister 76; and a level arrangement data storing register 77.

The combining unit 19R is formed by a data output processing unit 64.

In the configuration of FIG. 10, the digital red primary color signalDRB from the white balance adjusting unit 13 in FIG. 5 is supplied toboth the nonlinear processing unit 17R and the three-dimensionalcorrection unit 18R.

In the nonlinear processing unit 17R, the digital red primary colorsignal DRB is supplied to the look-up table 61.

The look-up table 61 sequentially detects the signal level of thedigital red primary color signal DRB, and refers to a table in responseto the detected signal level. Specifically, the look-up table 61includes a gamma correction data table representing nonlinearcharacteristics in opposite relation to the input voltage-lighttransmittance characteristics of the liquid crystal panel included inthe liquid crystal display panel unit 52R. Gamma correction datacorresponding to the signal level of the digital red primary colorsignal DRB is sequentially read.

The gamma correction data in the gamma correction data table is storedin the gamma correction data storing unit 63. The gamma correction datagenerating unit 62 is operated to set the gamma correction data in thegamma correction data table within the look-up table 61.

The nonlinear processing unit 17R as described above compares the signallevel of the digital red primary color signal DRB supplied to thenonlinear processing unit 17R with the gamma correction data table, andthen sequentially reads gamma correction data corresponding to thesignal level of the digital red primary color signal DRB. The gammacorrection data is derived as a digital red primary color signal DRCwhose signal level is gamma-corrected by nonlinear processing.

The digital red primary color signal DRC thus derived from the look-uptable 61 is a signal whose signal level is gamma-corrected to correctthe input voltage-light transmittance characteristics shown in FIG. 2,for example, of the liquid crystal panel included in the liquid crystaldisplay panel unit 52R. The digital red primary color signal DRC issupplied to the data output processing unit 64 in the combining unit19R.

In the three-dimensional correction unit 18R, on the other hand, thedigital red primary color signal DRB is supplied to the level blockdetermination processing unit 65 and the intra-level block levelcalculation processing unit 66.

The level block determination processing unit 65 determines a signallevel range, that is, an above-described level block to which thedigital red primary color signal DRB belongs.

Specifically, the level block determination processing unit 65 compareslevel boundary values 1, 2, . . . r set on a Z-axis with the signallevel of the digital red primary color signal DRB supplied thereto,determines an upper and a lower level boundary value k and k−1 of therange including the signal level as described with reference to FIG. 7,and thereby determines a level block Lk.

More specifically, letting dz be the signal level of the pixel data asshown in FIG. 9, when(k−1)≦dz<k,the level block Lk is determined.

The level block determination processing unit 65 then sends level blockdata DLk indicating the determined level block Lk to the intra-levelblock level calculation processing unit 66 and the three-dimensionalcorrection data generating unit 70.

In response to the level block data DLk, the intra-level block levelcalculation processing unit 66 performs calculation processing forcalculating a level within the level block Lk corresponding to thesignal level of the digital red primary color signal DRB supplied to theintra-level block level calculation processing unit 66.

For this calculation processing, the intra-level block level calculationprocessing unit 66 stores Z coordinate values of all the correctionvalues C shown in FIG. 6.

This calculation processing provides distances a and a′ as describedwith reference to FIG. 9.

Specifically, for example letting dz be a Z coordinate indicating alevel corresponding to the signal level of the supplied digital redprimary color signal DRB, on the basis of a relation:dz=(k−1)+a=k−a′,the distances a and a′ are obtained as Z coordinate differences a and a′by operations:a=dz−(k−1)a′=k−dz

Then, Z coordinate difference data DZa and DZa′ indicating the Zcoordinate differences a and a′ is supplied to the three-dimensionalinterpolation processing unit 71.

The address data generating unit 55R supplied with the horizontalsynchronizing signal SH and the vertical synchronizing signal SV is alsosupplied with a clock signal CL. The address data generating unit 55Routputs horizontal address data QRH and vertical address data QRV thatsequentially change with a cycle of the clock signal CL. The horizontaladdress data QRH and the vertical address data QRV are supplied to theposition block determination processing unit 72 and the intra-positionblock position calculation processing unit 73.

The position block determination processing unit 72 determines which ofposition blocks A[1, 1], A[1, 2], A[1, 3], . . . , A[1, q], A[2, 0], . .. , A[2, q], A[3, 0], . . . , A[3, q], . . . , A[p, 0], . . . , and A[p,q] within a grid block as described above, which corresponds to an imagescreen formed on the liquid crystal panel included in the liquid crystaldisplay panel unit 52R, includes the pixel data of interest.

That is, in response to the horizontal address data QRH and the verticaladdress data QRV from the address data generating unit 55R, the positionblock determination processing unit 72 detects which of the positionblocks A[1, 1] to A[p, q] a pixel (corresponding pixel) on the imagescreen formed on the liquid crystal panel included in the liquid crystaldisplay panel unit 52R, the pixel corresponding to each piece of pixeldata of the supplied digital red primary color signal DRB, belongs to.The position block determination processing unit 72 thereby determines aposition block A[i, j], for example, that the corresponding pixelbelongs to.

Letting dx be an X coordinate of the corresponding pixel dxy and dy be aY coordinate of the corresponding pixel dxy as in FIG. 8, when(i−1)≦dx<i(j−1)≦dy<j,it is determined that the corresponding pixel dxy is included in theposition block A[i, j].

Then, the position block determination processing unit 72 sends a pairof position block data DXi and DYj indicating the determined positionblock A[i, j] to the intra-position block position calculationprocessing unit 73, the intra-position block correction data formingunit 74, and the three-dimensional correction data generating unit 70.

In response to the horizontal address data QRH and the vertical addressdata QRV and the pair of position block data DXi and DYj indicating thedetermined position block A[i, j], the intra-position block positioncalculation processing unit 73 performs calculation processing forcalculating the position of the corresponding pixel within the positionblock A[i, j].

This calculation processing provides distances b, b′, c, and c′ asdescribed with reference to FIG. 8.

Specifically, letting dx and dy be an X coordinate and a Y coordinateindicating the position of the corresponding pixel of the supplieddigital red primary color signal DRB, on the basis of relations:dx=(i−1)+b=i−b′dy=(j−1)+c=j−c′,the distances b, b′, c, and c′ are obtained as X coordinate differencesb and b′ and Y coordinate differences c and c′ by operations:b=dx−(i−1)b′=i−dxc=dy−(j−1)c′=j−dy

Then, X coordinate difference-data DXb and DXb′ indicating the Xcoordinate differences b and b′ and Y coordinate difference data DYc andDYc′ indicating the Y coordinate differences c and c′ are supplied tothe three-dimensional interpolation processing unit 71.

The intra-position block correction data forming unit 74 sends a datareading control signal CXY corresponding to the position block data DXiand DYj to the correction data storing unit 75.

The correction data storing unit 75 stores correction values C(0, 0, 0). . . C(p, q, r) set at points of intersections in a coordinate spaceset by a coordinate axis X, a coordinate axis Y, and a coordinate axis Zperpendicular to one another, as shown in FIG. 6.

That is, the correction data storing unit 75 stores the correctionvalues C corresponding to respective coordinates of a total of(p+1)×(q+1)×(r+1) points of intersection.

These correction values C are loaded from the ROM 20R into thecorrection data storing unit 75.

Therefore, when a plurality of groups of correction values C(0, 0, 0) .. . C(p, q, r) are stored in the ROM 20R, it is possible to changecorrection values by selecting a group of correction values to be loadedinto the correction data storing unit 75.

According to the data reading control signal CXY corresponding to theposition block data DXi and DYj which signal is sent from theintra-position block correction data forming unit 74, the correctiondata storing unit 75 reads a plurality of correction values C includedin the position block A[i, j] as correction data DPC, and then outputsthe correction data DPC to the intra-position block correction dataforming unit 74.

Specifically, the correction data DPC is a total of 4×(r+1) correctionvalues as correction values C(i−1, j−1, 0), C(i−1, j, 0), C(i, j−1, 0),and C(i, j, 0) at coordinates of four points of intersection definingthe position block A[i, j] in a plane at a level boundary 0 (Z=0),correction values C(i−1, j−1, 1), C(i−1, j, 1), C(i, j−1, 1), and C(i,j, 1) at coordinates of four points of intersection defining theposition block A[i, j] in a plane at a level boundary 1 (Z=1), . . . ,and correction values C(i−1, j−1, r), C(i−1, j, r), C(i, j−1, r), andC(i, j, r) at coordinates of four points of intersection defining theposition block A[i, j] in a plane at a level boundary r (Z=r).

The correction data DPC as the 4×(r+1) correction values C thus readaccording to the data reading control signal CXY corresponding to theposition block data DXi and DYj which signal is sent from theintra-position block correction data forming unit 74 is stored in theintra-position block correction data storing register 76 via theintra-position block correction data forming unit 74.

In response to the pair of position block data DXi and DYj indicatingthe position block A[i, j] from the position block determinationprocessing unit 72 and the level block data DLk indicating the levelblock Lk from the level block determination processing unit 65, thethree-dimensional correction data generating unit 70 reads a total ofeight correction values C at the intersection coordinates defining theposition block A[i, j] in a Z(k−1) plane and a Zk plane defining thelevel block Lk, among the 4×(r+1) correction values C stored in theintra-position block correction data storing register 76.

Specifically, the three-dimensional correction data generating unit 70sends a data reading control signal (address) for reading the eightcorrection values C at the intersection coordinates to theintra-position block correction data storing register 76. Thereby thetotal of eight correction values C are read from the intra-positionblock correction data storing register 76 as correction data DPC′ as thefour correction values C(i−1, j−1, k−1), C(i−1, j, k−1), C(i, j−1, k−1),and C(i, j, k−1) defining the position block A[i, j] in the plane at thelevel boundary value (k−1), and the four correction values C(i−1, j−1,k), C(i−1, j, k), C(i, j−1, k), and C(i, j, k) defining the positionblock A[i, j] in the plane at the level boundary value k. The correctiondata DPC′ is supplied through the three-dimensional correction datagenerating unit 70 to the three-dimensional interpolation processingunit 71.

The three-dimensional interpolation processing unit 71 is supplied witha total of six pieces of coordinate difference data as the Z coordinatedifference data DZa and DZa′ indicating the Z coordinate differences aand a′, the Z coordinate difference data DZa and DZa′ being calculatedby the intra-level block level calculation processing unit 66, and the Xcoordinate difference data DXb and DXb′ indicating the X coordinatedifferences b and b′ and the Y coordinate difference data DYc and DYc′indicating the Y coordinate differences c and c′, the X coordinatedifference data DXb and DXb′ and the Y coordinate difference data DYcand DYc′ being calculated by the intra-position block positioncalculation processing unit 73.

Using the six pieces of coordinate difference data as parameters, thethree-dimensional interpolation processing unit 71 performsthree-dimensional interpolation processing with the total of eightpieces of correction data DPC′, that is, the eight correction valuesC(i−1, j−1, k−1), C(i−1, j, k−1), C(i, j−1, k−1), C(i, j, k−1), C(i−1,j−1, k), C(i−1, j, k), C(i, j−1, k), and C(i, j, k) at the intersectioncoordinates read from the intra-position block correction data storingregister 76.

Thereby a signal resulting from the three-dimensional correction of thesignal level of the pixel data of the digital red primary color signalDRB in which the corresponding pixel is set is formed, and is then sentout as a three-dimensionally corrected digital red primary color signalDRS from the three-dimensional interpolation processing unit 71.

The three-dimensional interpolation processing with the eight correctionvalues, performed by the three-dimensional interpolation processing unit71 and using, as parameters, the Z coordinate difference data DZa andDZa′, the X coordinate difference data DXb and DXb′, and the Ycoordinate difference data DYc and DYc′, is linear interpolationprocessing, for example, and corresponds to correction datacorresponding to a coordinate position (X, Y, Z) expressed as follows:(X, Y, Z)=C(i−1, j−1, k−1)×b′×c′×a′+C(i, j−1, k−1)×b×c′×a′+C(i−1, j,k−1)×b′×c×a′+C(i, j, k−1)×b×c×a′+C(i−1, j−1, k)×b′×c′×a+C(i, j−1,k)×b×c′×a+C(i−1, j, k)×b′×c×a+C(i, j, k)×b×c×a

The three-dimensionally corrected digital red primary color signal DRSthus sent out from the three-dimensional interpolation processing unit71 is supplied to the data output processing unit 64 of the combiningunit 49R. Then, the data output processing unit 64 combines the digitalred primary color signal DRC from the nonlinear processing unit 47R withthe three-dimensionally corrected digital red primary color signal DRS,and thereby forms a gamma-corrected and three-dimensionally correcteddigital red primary color signal DRD.

The nonlinear correction unit 16 makes gamma correction andthree-dimensional correction by the configuration described thus far.Thereby, when a nonlinearly corrected video signal is obtained, thenonlinearly corrected video signal is corrected for undesired variationsin brightness and chromaticity according to the horizontal and verticalposition on the display screen, and further for undesired variations inbrightness and chromaticity of the display screen obtained on the imagedisplay unit which variations are caused by variations in level of theoriginal video signal.

The nonlinear correction unit 16 in this example further includes thelevel arrangement data storing register 77 in the three-dimensionalcorrection unit 18R.

The level arrangement data storing register 77 retains a group of (r+1)actual level values as boundary level values described as the boundarylevels 1, 2, . . . r in the Z-axis direction.

The level arrangement data storing register 77 has (r+1) registers 77-0,77-1, 77-2, . . . 77-r, as shown in FIG. 11.

Supposing that the boundary level values described as the boundarylevels 1, 2, . . . r in the Z-axis direction in FIG. 6 are denoted asZ0, Z1, Z2, . . . Zr, the boundary level values Z0, Z1, Z2, . . . Zr areset in the registers 77-0, 77-1, 77-2, . . . 77-r, respectively, by aregister writing control signal DLS from the CPU 1 shown in FIG. 5.

The level arrangement data storing register 77 supplies the level blockdetermination processing unit 65 with the boundary level values Z0, Z1,Z2, . . . Zr stored in the registers 77-0, 77-1, 77-2, . . . 77-r,respectively, as level arrangement data Zn.

The level block determination processing unit 65 uses the levelarrangement data Zn (Z0 to Zr) supplied thereto as actual level boundaryvalues of the boundary levels 1, 2, . . . r in the Z-axis direction toperform the above-described level block determination processing.

That is, in this example, the CPU 1 rewrites the boundary level valuesZ0, Z1, Z2, . . . Zr by the register writing control signal DLS, wherebythe actual level boundary values of the boundary levels 1, 2, . . . r inthe Z-axis direction can be variably set on an arbitrary basis.

For example, suppose that level determination is made with a 1024resolution in the Z-axis direction and that there are eight dividedlevel blocks.

In this case, when the boundary levels 1, 2, . . . r are to be arrangedat regular intervals, it suffices to write boundary level values Z0 toZr (=Z8) as shown in FIG. 12A to the registers 77-0, 77-1, 77-2, . . .77-r, respectively.

Specifically, Z0=0, Z1=127, Z2=255, . . . Z8 (Zr)=1023 are set.

Then, the level block determination processing unit 65 determines thateight level blocks L1, L2, . . . L8 are set at regular intervals, toperform the above-described level block determination processing.

In a case of gamma correction characteristics when the display device isa CRT, for example, the level blocks L1 to L8 at regular intervals withrespect to input data level as shown in FIG. 13 are set.

Gamma correction characteristics in a case of a liquid crystal panel areshown in FIG. 14. In the case of such characteristics, three-dimensionalcorrection can be made with higher accuracy by setting smaller levelblocks in a range with a steep gradient.

In such a case, the CPU 1 writes Z0=0, Z1=va1, Z2=va2, . . . Z8 (Zr)=va8(=1023) as boundary level values Z0 to Zr (=Z8) as shown in FIG. 12B tothe registers 77-0, 77-1, 77-2, . . . 77-r.

Then, the level block determination processing unit 65 determines thateight level blocks L1, L2, . . . L8, which are smaller in a low-levelrange and larger in a high-level range, are set, to perform theabove-described level block determination processing.

Thus, as shown in FIG. 14, the level blocks can be set according to agamma correction characteristic curve of the liquid crystal panel.

Further, as with FIG. 13, FIG. 15 shows gamma correction characteristicsin the case of a CRT. Also in the case of such characteristics,three-dimensional correction can be made with higher accuracy by settingsmaller level blocks in a range with a steep gradient.

In this case, the CPU 1 writes Z0=0, Z1=vb1, Z2=vb2, . . . Z8 (Zr)=vb8(=1023) as boundary level values Z0 to Zr (=Z8) as shown in FIG. 13C tothe registers 77-0, 77-1, 77-2, . . . 77-r.

Then, the level block determination processing unit 65 determines thateight level blocks L1, L2, . . . L8, which are smaller in a high-levelrange and larger in a low-level range, are set, to perform theabove-described level block determination processing.

Thus, as shown in FIG. 15, the level blocks can be set according to agamma correction characteristic curve of the CRT.

The examples of level boundary arrangement shown in FIGS. 12A to 12C andFIGS. 13 to 15 are mere examples. That is, in the first example,according to the type of display device or as an operation in anadjustment process or the like, the CPU 1 writes actual level boundaryvalues to the registers 77-0, 77-1, 77-2, . . . 77-r, whereby levelblocks can be variably set on an arbitrary basis.

It is thus possible to make optimum level block setting corresponding tothe type of display device, variations in characteristics of eachindividual device and the like, and thereby improve the accuracy of thethree-dimensional correction.

It is to be noted that in the first example, it suffices only to setlevel boundary values (boundaries of level blocks) variably, and that itis not necessary to change the correction data C according to change ofthe level boundary values. That is, in a case of a level boundary(Z-axis) k, for example, even when the k value is changed arbitrarily,correction values C(0, 0, k) to C(p, q, k) at the k level are used asthey are as correction values C(0, 0, k) to C(p, q, k) at the changed kvalue.

Hence, variably setting level boundary values does not mean that anenormous amount of correction values C needs to be prepared inconsideration of ranges of the variable level boundary values.

4. Second Example of Configuration of Nonlinear Correction Unit

FIG. 16 shows a second example of configuration of the nonlinearcorrection unit 16. In the second to sixth configuration examples to bedescribed below, the same parts as in the first configuration example ofFIG. 10 are identified by the same reference numerals, and theirrepeated description will be omitted. Basic operations for gammacorrection and three-dimensional correction are the same.

The second configuration example of FIG. 16 is different from theforegoing first configuration example in that the configuration exampleof FIG. 16 has a level arrangement data selecting unit 78 in place ofthe level arrangement data storing register 77 in FIG. 10.

The level arrangement data selecting unit 78 is configured as shown inFIG. 17. Specifically, the level arrangement data selecting unit 78includes a level arrangement data memory 78 a and a level arrangementdata selector 78 b.

The level arrangement data memory 78 a has memory areas set incorrespondence with various types of display devices A, B, . . . x,respectively. The areas have level arrangement data ZnA, ZnB, . . . Znxstored therein in correspondence with the display devices A, B, . . . X,respectively.

The level arrangement data ZnA, for example., is a data group ofboundary level values Z0 to Zr corresponding to a certain display deviceA (liquid crystal panel, for example).

Further, the level arrangement data ZnB, for example, is a data group ofboundary level values Z0 to Zr corresponding to a certain display deviceB (CRT, for example).

The level arrangement data selector 78 b selects one of the pieces oflevel arrangement data ZnA, ZnB, . . . Znx on the basis of a selectioncontrol signal DSEL from the CPU 1, and then reads the piece of datafrom the level arrangement data memory 78 a. Boundary level values Z0,Z1, Z2, . . . Zr as the selected level arrangement data Zn* are suppliedas level arrangement data Zn to a level block determination processingunit 65.

The level block determination processing unit 65 in FIG. 16 performs theabove-described level block determination processing using the levelarrangement data Zn (Z0 to Zr) supplied thereto as actual level boundaryvalues of boundary levels 1, 2, . . . r in a Z-axis direction.

That is, in this example, the CPU 1 can variably set the boundary levelvalues Z0, Z1, Z2, . . . Zr used in level block determination in thelevel block determination processing unit 65 by the selection controlsignal DSEL.

For example, suppose that the boundary level values Z0 to Zr (=Z8) asthe level arrangement data ZnA stored in the level arrangement datamemory 78 a are Z0=0, Z1=va1, Z2=va2, . . . Z8 (Zr)=va8 (=1023) as shownin FIG. 12B. Then, when the level arrangement data ZnA is selected bythe selection control signal DSEL, a state of level blocks as shown inFIG. 14 is obtained.

Further, suppose for example that the boundary level values Z0 to Zr(=Z8) as the level arrangement data ZnB stored in the level arrangementdata memory 78 a are Z0=0, Z1=vb1, Z2=vb2, . . . Z8 (Zr)=vb8 (=1023) asshown in FIG. 12C. Then, when the level arrangement data ZnB is selectedby the selection control signal DSEL, a state of level blocks as shownin FIG. 15 is obtained.

Thus, in the second configuration example, level blocks can be setvariably within the variety of the pieces of level arrangement data ZnA,ZnB, . . . stored in the level arrangement data memory 78 a.

Also in this case, when various level arrangement data ZnA, ZnB, . . .are stored in correspondence with various types of display devices, forexample, the accuracy of three-dimensional correction can be improved bymaking level block setting in correspondence with the various types ofdisplay devices.

Further, when a plurality of pieces of level arrangement data ZnA1,ZnA2, . . . corresponding to a certain type of display device are storedto deal with specific display devices, for example, the accuracy ofthree-dimensional correction can be improved by making optimum levelblock setting in correspondence with variations in characteristics ofeach individual device or the like.

Of course, as compared with the foregoing first configuration examplethat can variably set boundary level values on a completely arbitrarybasis, the second example makes level block setting less freely, becausethe variable level block setting of the second example is made withinthe variety of the pieces of level arrangement data ZnA, ZnB, . . .stored in the level arrangement data memory 78 a. However, thisvirtually presents no practical problem when each of the pieces of levelarrangement data ZnA, ZnB, . . . stored is made to be highly practicaldata.

Further, it suffices to select optimum data for practical variablesetting, and therefore the level block setting processing is simplified.For example, a setting operation in an adjustment process is simplified,and a load of processing software on the CPU 1 can be reduced.

Furthermore, the second example can be considerably reduced in circuitscale as compared with the first configuration example, thus providing ahighly practical circuit.

Depending on design of data values as the level arrangement data ZnA,ZnB, . . . to be stored, in particular, the reduction in circuit scalecan be furthered.

In the level block determination processing unit 65 as a digitalprocessing circuit, when each level boundary value is a power of 2,calculation load is reduced. The circuit configuration of the levelblock determination processing unit 65 can therefore be simplified. Onthe other hand, when each level boundary value that can be set iscompletely arbitrary, as in the first configuration example, even levelboundary values that are not a power of 2 need to be handled. It istherefore necessary to enhance calculating power, which causes anincrease in circuit scale.

When a power of 2 (for example a value such as 32, 64, 128, 192, 256, .. . ) is used as each of the level boundary values of the stored levelarrangement data ZnA, ZnB, . . . , a level boundary value other than apower of 2 cannot be set. Hence, the level block determinationprocessing unit 65 can be substantially simplified.

Thus, in the second configuration example, the accuracy ofthree-dimensional correction can be improved to a satisfactory level,and also the circuit scale can be reduced. The second configurationexample therefore has an effect of providing a highly practicalnonlinear processing device.

5. Third Example of Configuration of Nonlinear Correction Unit

A third example of configuration of the nonlinear correction unit 16will next be described with reference to FIG. 18.

The third configuration example is not provided with means for variablysetting level arrangement data Zn itself as in the foregoing first andsecond configuration examples, but is provided with a level offset dataregister 79.

Since the third configuration example does not variably set levelarrangement data Zn itself, a level block determination processing unit65 is provided with a memory unit 65 a for storing fixed levelarrangement data Zn (Z0, Z1, . . . Zr). When a liquid crystal panel isused as a display device as in FIG. 5, for example, the memory unit 65 astores the level arrangement data Z0, Z1, Zr as values corresponding tova1, va2, . . . , va8 shown in FIG. 19A, for example, and hence levelblocks L1 to L8 set therein as shown in FIG. 19A.

An offset value Zs is written to the level offset data register 79 by awriting control signal DLOF from the CPU 1. The offset value Zs issupplied to the level block determination processing unit 65 and anintra-level block level calculation processing unit 66.

The level block determination processing unit 65 and the intra-levelblock level calculation processing unit 66 shift level boundary valuesZ1 to Zr by the offset value Zs, and then perform level blockdetermination processing and intra-level block level calculationprocessing.

As described in the first configuration example, the level blockdetermination processing unit 65 determines a level block to which thedigital red primary color signal DRB belongs.

Specifically, the level block determination processing unit 65 compareslevel boundary values 1 to r set on a Z-axis (in this case, Z1 to Zrstored in the memory unit 65) with signal level of the digital redprimary color signal DRB supplied thereto, determines an upper and alower level boundary value k (=Zk) and k−1 (=Zk−1) of a range includingthe signal level as described with reference to FIG. 7, and therebydetermines a level block Lk. That is, basically, when the signal leveldz of the pixel data is Zk−1≦dz<Zk, the level block Lk is determined.

In a case where each level block is shifted to a lower level by theoffset value Zs, for example, the level block determination processingunit 65 in the third configuration example determines the level block Lkwhen the signal level dz of the pixel data is(Zk−1)−Zs≦dz<Zk−Zs.

In a case where each level block is shifted to a higher level by theoffset value Zs, the level block determination processing unit 65 in thethird configuration example determines the level block Lk when thesignal level dz of the pixel data is(Zk−1)+Zs≦dz<Zk+Zs.

In response to level block data DLk, the intra-level block levelcalculation processing unit 66 calculates Z coordinate differences a anda′ as a level within the level block Lk corresponding to the signallevel of the digital red primary color signal DRB supplied to theintra-level block level calculation processing unit 66. The intra-levelblock level calculation processing unit 66 then supplies the Zcoordinate differences a and a′ as Z coordinate difference data DZa andDZa′ to a three-dimensional interpolation processing unit 71. In thisexample, when each level block is shifted to a lower level by the offsetvalue Zs, the Z coordinate differences a and a′ are obtained by thefollowing operations using the offset value Zs.a=dz−(Zk−1)+Zsa′=Zk−dz−Zs

When each level block is shifted to a higher level by the offset valueZs, the Z coordinate differences a and a′ may be obtained by thefollowing:a=dz−(Zk−1)−Zsa′=Zk−dz+Zs

The level block determination processing unit 65 and the intra-levelblock level calculation processing unit 66 perform the above-describedprocessing using the offset value Zs. Actual level boundaries arethereby shifted by the offset value Zs from a state of FIG. 19A to astate of FIG. 19B, for example. That is, level block settings arechanged.

Thus, the third configuration example can improve the accuracy ofthree-dimensional correction by shifting the level boundary values bythe offset value Zs, or by the CPU 1 setting an optimum offset value Zsby the writing control signal DLOF.

Further, level block variable setting is enabled only by providing thelevel offset data register 79. The third configuration example is thusof a simple circuit configuration and hence highly practical.

Further, when each of the level boundary values Z0 to Zr stored in thememory unit 65 a is a power of 2, the circuit configuration of the levelblock determination processing unit 65 can also be simplified.

It is to be noted that while one offset value Zs can be arbitrarily setin this example, a plurality of offset values may be set, for example.For example, different offset values Zs may be given in correspondencewith level boundary values in a low-level range, a middle-level range,and a high-level range, respectively, or offset values may beindividually given to each of the level boundary values Z0 to Zr. Thisallows more accurate level block setting.

6. Fourth Example of Configuration of Nonlinear Correction Unit

A fourth example of configuration of the nonlinear correction unit 16will next be described with reference to FIG. 20.

The fourth configuration example is a combination of the foregoingsecond and third configuration examples. Specifically, the fourthconfiguration example has a level arrangement data selecting unit 78configured as shown in FIG. 17, for example, whereby level arrangementdata Zn can be variably set by a selection control signal DSEL from theCPU 1.

The fourth configuration example further includes an offset dataregister 79. An offset value Zs is set by a writing control signal DLOFfrom the CPU 1, and then supplied to a level block determinationprocessing unit 65 and an intra-level block level calculation processingunit 66, whereby level block boundary values (level arrangement data)are shifted as described in the foregoing third configuration example.

Thus, the fourth configuration example can make appropriate level blocksetting in accordance with the display device or the like as in thesecond configuration example, and further adjust the level block settingto a more appropriate state by setting the offset value Zs.

7. Fifth Example of Configuration of Nonlinear Correction Unit

A fifth example of configuration of the nonlinear correction unit 16will next be described.

The fifth configuration example does not change level boundary values(level block setting) in a level direction. The fifth configurationexample attains a proper relative position relation between an imagearea of a video signal and a grid block in a horizontal and a verticaldirection.

It is best that an upper edge, a lower edge, a left edge, and a rightedge of a grid block of correction values in the horizontal and verticaltwo-dimensional directions coincide with those of an image area. Thatis, it is ideal if coordinates (0, 0), (p, 0), (0, q), and (p, q) atfour corners of the grid block of FIG. 3, for example, represent fourcorners of the image area as they are.

However, the image area varies according to resolution of the image,while it is impractical for a reason of increase in circuit scale or thelike to prepare a large number of grid blocks (correction values) todeal with various resolutions.

Accordingly, one grid block is provided for display devices with variousresolutions. However, this results in a vertically and horizontallyasymmetric relation between the grid block and the image area. Thus,correction of nonlinear characteristics in the two-dimensionaldirections may result in an unnatural image state.

When a nonlinear correction circuit in which a grid block provided for adevice with a high resolution is set is incorporated in a signalprocessing system for a display device with a low resolution, forexample, a relation between the grid block and the image area is asshown in FIG. 23A.

That is, since the grid block and the image area are made to correspondto each other by using coordinates (0, 0) as an origin, amounts ofdisplacement between the grid block and the image area are asymmetric inboth the horizontal direction and the vertical direction. This resultsin an unnatural image.

Accordingly, the fifth example is configured to be able to adjust therelative position relation between the image area and the grid block inthe horizontal and vertical directions so that the unnaturalness of theimage is eliminated by correction even when the resolution of thedisplay device does not match the grid block.

The fifth configuration example for this purpose is shown in FIG. 21.

The fifth configuration example has an H direction offset register 80and a V direction offset register 81.

Since unlike the foregoing configuration examples, the fifthconfiguration example does not variably set level arrangement data Zn, alevel block determination processing unit 65 is provided with a memoryunit 65 a for storing fixed level arrangement data Zn (Z0, Z1, . . . ,Zr). When a liquid crystal panel is used as a display device as in FIG.5, for example, the memory unit 65 a stores the level arrangement dataZ0, Z1, . . . , Zr as values corresponding to va1, va2, . . . , va8shown in FIG. 19A, for example, and hence level blocks L1 to L8 settherein as shown in FIG. 19A. In the fifth example, the level blocksettings are fixed.

An offset value Xs is written to the H direction offset register 80 by awriting control signal DHOF from the CPU 1. The offset value Xs issupplied to a position block determination processing unit 72 and anintra-position block position calculation processing unit 73.

An offset value Ys is written to the V direction offset register 81 by awriting control signal DVOF from the CPU 1. The offset value Ys issupplied to the position block determination processing unit 72 and theintra-position block position calculation processing unit 73.

The position block determination processing unit 72 and theintra-position block position calculation processing unit 73 shift agrid block forming position blocks by the offset values Xs and Ys in anH (horizontal) direction and a V (vertical) direction, respectively, andthen perform position block determination processing and intra-positionblock position calculation processing.

As described in the first configuration example, on the basis ofhorizontal address data QRH and vertical address data QRV, the positionblock determination processing unit 72 determines a position block A[i,j] including pixel data of interest as one of position blocks A[1, 1] .. . A[p, q] within the grid block.

In the fifth configuration example, the level block determinationprocessing unit 65 is supplied with the offset values Xs and Ys, shiftsthe position of the grid block relative to an image area by the offsetvalues Xs and Ys in the horizontal direction and the vertical direction,respectively, and then determines the position block.

Specifically, in this case, letting dx be an X coordinate ofcorresponding pixel dxy and dy be a Y coordinate of the correspondingpixel dxy as in FIG. 22A, when(i−1)≦(dx−Xs)<i(j−1)≦(dy−Ys)<j,it is determined that the corresponding pixel dxy is included in theposition block A[i, j].

This means that the position of the corresponding pixel dxy on the gridblock is shifted by the offset values Xs and Ys as shown in FIG. 22B.

Then, the position block determination processing unit 72 sends a pairof position block data DXi and DYj indicating the determined positionblock A[i, j] to the intra-position block position calculationprocessing unit 73, an intra-position block correction data forming unit74, and a three-dimensional correction data generating unit 70.

In response to the horizontal address data QRH and the vertical addressdata QRV and the pair of position block data DXi and DYj indicating thedetermined position block A[i, j], the intra-position block positioncalculation processing unit 73 performs calculation processing forcalculating the position of the corresponding pixel within the positionblock A[i, j]. At this time, the offset values Xs and Ys are also usedfor the calculation.

As described in the first configuration example or the like withreference to FIG. 8, for example, the processing for obtaining theinformation of the position of the corresponding pixel within theposition block is processing for obtaining distances b, b′, c, and c′.The distances b and b′ become X coordinate difference data DXb and DXb′.The distances c and c′ become Y coordinate difference data DYc and DYc′.

However, when the offset values Xs and Ys are given in determining theposition block, the distances b, b′, c, and c′ (DXb, DXb′, DYc, andDYc′) are changed, as is understood by comparison between FIG. 22A andFIG. 22B.

The intra-position block position calculation processing unit 73 in thefifth example therefore calculates the distances b, b′, c, and c′ (DXb,DXb′, DYc, and DYc′) in FIG. 22B.

Thus, the distances b, b′, c, and c′ are obtained by operations:b=dx−Xs−(i−1)b′=i−dx+Xsc=dy−Ys−(j−1)c′=j−dy+Ys

Then, the X coordinate difference data DXb and DXb′ indicating the Xcoordinate differences b and b′ and the Y coordinate difference data DYcand DYc′ indicating the Y coordinate differences c and c′ are suppliedto a three-dimensional interpolation processing unit 71.

As described above, the position block determination processing unit 72and the intra-position block position calculation processing unit 73perform processing using the offset values Xs and Ys, whereby therelation between the grid block and the image area can be changed from astate of FIG. 23A to a state of FIG. 23B, for example.

That is, the fifth configuration example can adjust the relation betweenthe grid block and the image area by setting the offset values Xs andYs. Thereby the unnaturalness of the image as a result of correction ofnonlinear characteristics can be eliminated even when the upper edge,the lower edge, the left edge, and the right edge of the grid block donot coincide with those of the image area owing to the resolution.

In particular, it is best for eliminating the unnaturalness of the imagethat the relative position relation between the grid block and the imagearea be changed such that an amount of displacement between the gridblock and the image area is averaged in the horizontal direction or thevertical direction as shown in FIG. 23B, for example.

Further, the relation between the grid block and the image area can beadjusted only by providing the H direction offset register 80 and the Vdirection offset register 81. In addition, it suffices to prepare onegrid block (a group of correction values in the horizontal and verticaldirections). The fifth configuration example can therefore be formed bya small-scale circuit configuration and is hence highly practical.

8. Sixth Example of Configuration of Nonlinear Correction Unit

A sixth configuration example is shown in FIG. 24.

The sixth configuration example is a combination of the foregoingsecond, third, and fifth configuration examples. Specifically, the sixthconfiguration example has a level arrangement data selecting unit 78configured as shown in FIG. 17, for example, whereby level arrangementdata Zn can be variably set by a selection control signal DSEL from theCPU 1.

The sixth configuration example further includes an offset data register79. An offset value Zs is set by a writing control signal DLOF from theCPU 1, and then supplied to a level block determination processing unit65 and an intra-level block level calculation processing unit 66,whereby level block boundary values (level arrangement data) are shiftedas described in the foregoing third configuration example.

The sixth configuration example further includes an H direction offsetregister 80 and a V direction offset register 81.

An offset value Xs is written to the H direction offset register 80 by awriting control signal DHOF from the CPU 1. The offset value Xs issupplied to a position block determination processing unit 72 and anintra-position block position calculation processing unit 73.

An offset value Ys is written to the V direction offset register 81 by awriting control signal DVOF from the CPU 1. The offset value Ys issupplied to the position block determination processing unit 72 and theintra-position block position calculation processing unit 73.

Thereby a relative position relation between a grid block and an imagearea can be adjusted to a suitable state as described above.

Thus, the sixth configuration example can make appropriate level blocksetting in accordance with the display device or the like as in thesecond configuration example, and further adjust the level block settingto a more appropriate state by setting the offset value Zs as in thethird configuration example. Further, unnaturalness of images can beeliminated by adjusting the relative position relation between the gridblock and the image area to a suitable state as in the fifthconfiguration example.

While examples of configuration of the nonlinear correction unit 16 havebeen described above as the first to sixth configuration examples,various other examples are conceivable as the configuration of thenonlinear correction unit 16. In addition, other combinations of thefirst to sixth configuration examples are possible.

Further, various examples of configuration of an image display apparatushaving such a nonlinear correction unit 16 are conceivable andrealizable as apparatus compatible with various display devices.

INDUSTRIAL APPLICABILITY

As is understood from the above description, according to the presentinvention, a video signal nonlinearly processed (gamma-corrected) bynonlinear processing means is subjected to three-dimensional signallevel correction using three-dimensional correction values andcorresponding to a position in a horizontal direction and a verticaldirection of a pixel on an image screen of an image display unit and thesignal level of the pixel data. Thereby, accurate gamma correction ismade possible, and since level boundary values for the signal level inthe three-dimensional correction can be variably set, it is possible tomake three-dimensional correction of nonlinear characteristics ofvarious types of display devices and each individual display device withan optimum correction accuracy.

Thus, a nonlinear processing device according to the present inventioncan be suitably applied to image display apparatus using various typesof display devices. Also, it is possible to make adjustment to anoptimum three-dimensionally corrected state in each individual imagedisplay apparatus.

The nonlinear processing device further includes a register for storinga level boundary value, and by rewriting the level boundary value of theregister, the level boundary value used for determination by leveldetermining means is variably set. Thereby the setting of the levelboundary value is given a very high degree of freedom, and thus optimumsetting of the level boundary value is possible.

Further, level boundary setting means stores various level boundaryvalues, and by supplying the level determining means with a levelboundary value selected from the stored level boundary values, the levelboundary value is set. Thereby, the variable setting of the levelboundary value can be realized by a small-scale circuit configuration,and thus a highly practical nonlinear processing device is obtained.

Further, also when boundary value offsetting means for offsetting thelevel boundary value is provided, the variable setting of the levelboundary value can be realized by a small-scale circuit configuration,and thus a highly practical nonlinear processing device is obtained.

Further, as is understood from the above description, according to thepresent invention, a video signal nonlinearly processed(gamma-corrected) by nonlinear processing means is subjected tothree-dimensional signal level correction using three-dimensionalcorrection values and corresponding to a position in a horizontaldirection and a vertical direction of a pixel on an image screen of animage display unit and the signal level of the pixel data. Thereby,accurate gamma correction is made possible, and it is possible todispose horizontal and vertical area information (grid block) in anoptimum positional relation according to resolution of the screen. Thus,unnaturalness of an image as a result of correction of nonlinearcharacteristics can be eliminated even when the upper edge, the loweredge, the left edge, and the right edge of the grid block do notcoincide with those of an image area. In particular, it is best that arelative position relation between the grid block and the image area bechanged such that an amount of displacement between the grid block andthe image area is averaged in the horizontal direction or the verticaldirection.

Thus, a nonlinear processing device according to the present inventioncan be suitably applied to image display apparatus using display deviceswith various resolutions.

Further, when the nonlinear processing device is configured such that itsuffices to prepare one grid block and the positional relation ischanged by giving an offset in the horizontal and vertical directions,the nonlinear processing device can be formed by a small-scale circuitconfiguration and hence becomes highly practical.

1. A nonlinear processing device comprising: nonlinear processing meansfor correcting a video signal for signal level by nonlinear processingaccording to display characteristics of an image display unit forgenerating an image display based on the video signal; horizontal andvertical position determining means for determining a position in ahorizontal direction and a vertical direction of a pixel in said videosignal; level determining means for determining signal level of thepixel in said video signal; level boundary setting means for variablysetting a level boundary value used in determination by said leveldetermining means; wherein the level boundary value is arbitrarily andvariably set according to a first writing control signal sent by a CPU,boundary value offsetting means for supplying an offset value to saidlevel determining means and thereby offsetting the level boundary valueset to be used for determination by said level determining means;wherein an optimum offset value is set for the offset value according toa second writing control signal sent by the CPU, three-dimensionalcorrection means for generating a three-dimensional signal levelcorrection value according to the position in the horizontal directionand the vertical direction determined by said horizontal and verticalposition determining means and the signal level determined by said leveldetermining means, and thereby generating three-dimensional correctionof the video signal; and combining means for combining the video signalcorrected by said nonlinear processing means with the video signalcorrected by said three-dimensional correction means for output.
 2. Anonlinear processing device as claimed in claim 1, wherein said levelboundary setting means includes a register for storing a level boundaryvalue, and by rewriting the level boundary value of said register, thelevel boundary value used for determination by said level determiningmeans is variably set.
 3. A nonlinear processing device as claimed inclaim 1, wherein said level boundary setting means stores various levelboundary values, and by supplying said level determining means with alevel boundary value selected from the stored level boundary values, thelevel boundary value used for determination by said level determiningmeans is set.
 4. An image display apparatus comprising: nonlinearprocessing means for correcting a video signal level by nonlinearprocessing according to display characteristics of an image display unitfor generating an image display based on the video signal; horizontaland vertical position determining means for determining a position in ahorizontal direction and a vertical direction of a pixel in said videosignal; level determining means for determining signal level of thepixel in said video signal; level boundary setting means for variablysetting a level boundary value used in determination by said leveldetermining means; wherein the level boundary value is arbitrarily andvariably set according to a first writing control signal sent by a CPU,boundary value offsetting means for supplying an offset value to saidlevel determining means and thereby offsetting the level boundary valueset to be used for determination by said level determining means;wherein an optimum offset value is set for the offset value according toa second writing control signal sent by the CPU three-dimensionalcorrection means for generating a three-dimensional signal levelcorrection value according to the position in the horizontal directionand the vertical direction determined by said horizontal and verticalposition determining means and the signal level determined by said leveldetermining means, and thereby generating a three-dimensional correctionof the video signal; combining means for combining the video signalcorrected by said nonlinear processing means with the video signalcorrected by said three-dimensional correction means for output; andimage display means having the image display unit for generating animage display based on a video signal outputted from said combiningmeans.
 5. An image display apparatus as claimed in claim 4, wherein saidlevel boundary setting means has a register for storing a level boundaryvalue, and by rewriting the level boundary value of said register, thelevel boundary value used for determination by said level determiningmeans is variably set.
 6. An image display apparatus as claimed in claim4, wherein said level boundary setting means stores various levelboundary values, and by supplying said level determining means with alevel boundary value selected from the stored level boundary values, thelevel boundary value used for determination by said level determiningmeans is set.
 7. A nonlinear processing device comprising: nonlinearprocessing means for correcting a video signal for signal level bynonlinear processing according to display characteristics of an imagedisplay unit for generating an image display based on the video signal;horizontal and vertical position determining means for determining aposition in a horizontal direction and a vertical direction of a pixelin said video signal; horizontal and vertical relative position changingmeans for changing a relative position relation between horizontal andvertical area information used for determination by said horizontal andvertical position determining means and an image area of the videosignal for the determination by said horizontal and vertical positiondetermining means; level determining means for determining signal levelof the pixel in said video signal; level boundary setting means forvariably setting a level boundary value used in determination by saidlevel determining means; wherein the level boundary value is arbitrarilyand variably set according to a first writing control signal sent by aCPU; boundary value offsetting means for supplying an offset value tosaid level determining means and thereby offsetting the level boundaryvalue set to be used for determination by said level determining means;wherein an optimum offset value is set for the offset value according toa second writing control signal sent by the CPU; three-dimensionalcorrection means for generating a three-dimensional signal levelcorrection value according to the position in the horizontal directionand the vertical direction determined by said horizontal and verticalposition determining means and the signal level determined by said leveldetermining means, and thereby generating a three-dimensional correctionof the video signal; and combining means for combining the video signalcorrected by said nonlinear processing means with the video signalcorrected by said three-dimensional correction means for output.
 8. Anonlinear processing device as claimed in claim 7, wherein saidhorizontal and vertical relative position changing means changes saidrelative position relation by giving an offset value in the horizontaldirection and an offset value in the vertical direction to saidhorizontal and vertical position determining means.
 9. A nonlinearprocessing device as claimed in claim 7, wherein said horizontal andvertical relative position changing means changes said relative positionrelation such that an amount of displacement between said horizontal andvertical area information and said image area is averaged in thevertical direction or the horizontal direction.
 10. An image displayapparatus comprising: nonlinear processing means for correcting a videosignal for signal level by nonlinear processing according to displaycharacteristics of an image display unit for generating an image displaybased on the video signal; horizontal and vertical position determiningmeans for determining a position in a horizontal direction and avertical direction of a pixel in said video signal; horizontal andvertical relative position changing means for changing a relativeposition relation between horizontal and vertical area information usedfor determination by said horizontal and vertical position determiningmeans and an image area of the video signal for the determination bysaid horizontal and vertical position determining means; leveldetermining means for determining signal level of the pixel in saidvideo signal; level boundary setting means for variably setting a levelboundary value used in determination by said level determining means;wherein the level boundary value is arbitrarily and variably setaccording to a first writing control signal sent by a CPU, boundaryvalue offsetting means for supplying an offset value to said leveldetermining means and thereby offsetting the level boundary value set tobe used for determination by said level determining means; wherein anoptimum offset value is set for the offset value according to a secondwriting control signal sent by the CPU, three-dimensional correctionmeans for generating a three-dimensional signal level correction valueaccording to the position in the horizontal direction and the verticaldirection determined by said horizontal and vertical positiondetermining means and the signal level determined by said leveldetermining means, and thereby making three-dimensional correction ofthe video signal; combining means for combining the video signalcorrected by said nonlinear processing means with the video signalcorrected by said three-dimensional correction means for output; andimage display means having the image display unit for generating animage display based on a video signal outputted from said combiningmeans.
 11. An image display apparatus as claimed in claim 10, whereinsaid horizontal and vertical relative position changing means changessaid relative position relation by giving an offset value in thehorizontal direction and an offset value in the vertical direction tosaid horizontal and vertical position determining means.
 12. An imagedisplay apparatus as claimed in claim 10, wherein said horizontal andvertical relative position changing means changes said relative positionrelation such that an amount of displacement between said horizontal andvertical area information and said image area is averaged in thevertical direction or the horizontal direction.